1. Field of the Invention
The present invention relates to a semiconductor device wherein a substrate is bonded two another substrate by a bonding method utilizing ultrasonic oscillation. More specifically, the present invention relates to a semiconductor device wherein a chip (semiconductor substrate) is bonded to a chip-mounting substrate (circuit substrate) or a chip.
2. Background Art
Heretofore, a technique for bonding a chip (semiconductor substrate) to a chip-mounting substrate (circuit substrate) by bonding method utilizing ultrasonic oscillation has been used. In particular, for chips having small surface areas, such as SAW (surface acoustic wave) devices, bonding methods, such as FCB (flip chip bonding) wherein an Au bump formed on an electrode pad exposed on the chip is bonded with thermal compression to a terminal electrode having an Au-plated layer formed on a chip-mounting substrate while supplying ultrasonic oscillation, has been widely used.
A conventional semiconductor device will be briefly described below referring to FIG. 12A to FIG. 12D. FIG. 12A to FIG. 12D are schematic sectional views of a conventional semiconductor device in each bonding step of the manufacturing process.
In FIG. 12A to FIG. 12D, the reference numeral 1 denotes a chip as a substrate; 1a denotes the facing surface (one side) of the chip 1 facing a chip mounting substrate after bonding; 2 denotes an electrode pad (electrode portion) formed so as to be exposed on the facing surface 1a of the chip 1; 3 denotes a bump (conductor for connecting) for electrically and mechanically connecting the electrode pad 2 with a terminal electrode; 6 denotes a chip-mounting substrate (second substrate), such as a mounting board and an interposer; 6a denotes the facing surface (one side) of the chip-mounting substrate 6 facing the chip 1 after mounting; 7 denotes a terminal electrode (electrode portion) having an Au-plated surface layer formed so as to be exposed on the facing surface 6a of the chip-mounting substrate 6; 20 denotes a stage acting as a holding tool for holding the chip 1 in the mounting process: and 25 denotes a stage acting as a holding tool for holding the chip-mounting substrate 6 in the mounting process.
The semiconductor device constituted as described above is fabricated as described below. First, as FIG. 12A shows, bumps 3 are formed on electrode pads 2 exposed on the facing surface 1a of the chip 1 using a wire-bonding technique.
In the facing surface 1a of the chip 1, the regions other than the regions wherein the electrode pads 2 are exposed are coated with an insulating protective film. The electrode pads 2 are formed of Al or the like, and are electrically connected to the circuits in the chip 1. Furthermore, the bump 3 are formed of a metal such as Au, solder, Ag, Cu, Al, Bi, Zn, Sb, In, Pd, Si, or alloys thereof.
Next, as FIG. 12B shows, the facing surface 1a of the chip 1 is aligned with the facing surface 6a of the chip-mounting substrate 6.
Specifically, the chip-mounting substrate 6 is placed on the stage 25 so that the facing surface 6a whereon terminal electrodes 7 are formed faces up. On the other hand, the semiconductor device 1 is placed on the stage 20 so that the facing surface 1a whereon bumps 3 and the like are formed faces down. Thereafter, the stage 20 is moved so that the locations of the terminal electrodes 7 on the chip-mounting substrate 6 are aligned with the locations of the bumps 3 on the chip 1.
Here, the chip-mounting substrate 6 is formed of, for example, a glass-epoxy material. The terminal electrodes 7 are formed by sequentially laminating an Ni-plated layer and an Au-plated layer on a Cu wiring. The chip 1 and the chip-mounting substrate 6 are attracted and held on the stages 20 and 25, respectively, by air suction from hollow portions (not shown) provided in each of the stages 20 and 25.
Next, as FIG. 12C shows, a plurality of bumps 3 on the chip 1 are electrically and mechanically connected to a plurality of terminal electrodes 7 on the chip-mounting substrate 6 using a so-called thermo-compression bonding combined with ultrasonic oscillation.
Specifically, the bumps 3 and the terminal electrodes 7 are heated, a load W is applied from the chip 1 side as shown by the arrow in the drawing, and ultrasonic oscillation S in the direction of the other arrow in the drawing to connect the bumps 3 to the terminal electrodes 7.
Here, the frequency of the ultrasonic oscillation supplied to the chip 1 and the chip-mounting substrate 6 is about 60 kHz.
Thus, a semiconductor device wherein the chip 1 is mounted on the chip-mounting substrate 6 shown in FIG. 12D is manufactured.
In the above-described prior art, the method for bonding a substrate to another substrate utilizing ultrasonic oscillation is more advantageous than the bonding method using only heat and pressure in that both substrates can be connected at a low temperature.
However, if the bonding method utilizing ultrasonic oscillation is used not in the bonding process of the above-mentioned SAW device having small chips, but in the bonding process of devices such as a memory device having chips having a large surface area and having a large number of bumps, there was a problem of the deterioration of joint, such as the fluctuation of joining qualities and the damage of bumps in the junctions between bumps and terminal electrodes due to resonance of ultrasonic oscillation.
Especially, in the case of a chip having a large surface area, and having a plurality of bumps arranged as conductors for the connection to the peripheral portions, if ultrasonic oscillation is supplied after such a large chip has been mounted on a chip-mounting substrate, an oscillation having nodes (the portions where the amplitude is zero) in portions where connecting conductors are provided, and a loop (the portion where the amplitude is largest) in the central portion of the substrate where no connecting conductors are provided, is generated.
Since the structure comprising such a chip mounted on a chip-mounting substrate (hereafter referred to as a mounting material) has a large distance between nodes of the oscillation, and the chip-mounting substrate is formed of a glass-epoxy material of a low rigidity, the resonance frequency (natural frequency) as a mounting material is relatively low.
Therefore, there may be a case where the frequency of the ultrasonic oscillation applied in joining agrees with the resonance frequency of the mounting material, and in this case, the mounting material resonates. The resonance is an irregular oscillation having the direction different from the direction of the ultrasonic oscillation required for the connection of the substrates (for example, the oscillation in the direction shown by the arrow in FIG. 12D). Therefore, the contacting plane between a bump and a terminal electrode becomes unable to maintain contact when ultrasonic oscillation is supplied, and the joint will be deteriorated.
The object of the present invention is to solve the above-described problems. The present invention provides a semiconductor device ensuring that a substrate, such as a chip, having a relatively large surface area can be bonded to another substrate such as a chip-mounting substrate. A bonding method utilizing ultrasonic oscillation without generating resonance due to ultrasonic oscillation is used.
In one embodiment of the present invention, a semiconductor device includes a first substrate, a second substrate, a plurality of conductors, and supporting members. The first substrate has a plurality of electrode portions disposed on one side thereof. The second substrate has a plurality of electrode portions disposed on one side thereof. The conductors are for connecting the plurality of electrode portions of the first substrate to the plurality of electrode portions of the second substrate. The supporting members supporting the first substrate and the second substrate are disposed on a location where resonance caused by ultrasonic oscillation externally supplied is restrained in the state where the first substrate is connected to the second substrate.
In another embodiment of the present invention, a semiconductor device includes a first substrate, a second substrate, a plurality of conductors, and a high-rigidity member. The first substrate has a plurality of electrode portions disposed on one side thereof. The second substrate has a plurality of electrode portions disposed on one side thereof. The conductors are for connecting the plurality of electrode portions of the first substrate to the plurality of electrode portions of the second substrate. The high-rigidity member enhancing the rigidity-of the substrates is formed on the first substrate or the second substrate.
The semiconductor device preferably comprises a non-conductive resin member contacting to the first substrate and the second substrate.
A chip can be mounted on a substrate with a high bondability, because the supporting members prevent irregular oscillation and resonance caused by the ultrasonic oscillation.
Other and further objects, features and advantages of the invention will appear more fully from the following description.